Japan Just Built What ASML Feared Most

Overview

ASML; Canon; Tsumoru Shintake (OIST); Nikon; Rapidus argues that Japan is not about to replace ASML’s extreme ultraviolet (EUV) lithography monopoly with one superior machine. Instead, Canon, Okinawa Institute of Science and Technology (OIST), Nikon, and Rapidus are developing several alternative routes that could reduce ASML’s pricing power, expand access to chip manufacturing, and make the semiconductor industry less dependent on one supplier.

The central claim is therefore strategic rather than immediate: ASML remains indispensable for leading-edge, high-volume production, but Japan is weakening the assumption that there is no practical alternative. Relevant source moment: [27:21–27:58]

Main argument

The reasoning follows a four-part chain. First, ASML’s dominance rests on the extraordinary complexity and cost of EUV machines, which use laser-produced tin plasma, vacuum systems, and ultra-precise mirrors.

Second, alternatives do not need to outperform EUV everywhere; they only need to serve some applications more cheaply, with less power, or with lower technical requirements. Third, Canon’s nano-imprint lithography could challenge the cost structure of chip patterning, while OIST’s simplified EUV design could make lower-throughput EUV systems more accessible.

Nikon’s planned deep ultraviolet competition could attack ASML’s large non-EUV business, and Rapidus could create a Japanese customer and manufacturing base for advanced chips. The argument assumes that chipmakers will accept trade-offs such as lower throughput, narrower application, or less mature yields when capital costs, electricity use, supply-chain resilience, or geopolitical independence become more important.

Evidence and examples

ASML reportedly controls about 94% of the overall lithography market and 100% of the extreme ultraviolet segment. The source describes EUV scanners costing roughly $200 million, with high-NA EUV systems priced around $350 million, while requiring complex vacuum optics and a plasma source generated from tin droplets struck by high-power lasers. Canon’s FPA-1200NZ2C uses nano-imprint lithography: a patterned quartz template physically presses a circuit design into resist on a wafer, rather than projecting the pattern through an optical system.

The source attributes several potentially important advantages to Canon’s approach: A claimed price in the tens of millions of dollars rather than hundreds of millions. Power consumption of roughly 100 kilowatts, compared with more than one megawatt for an EUV tool. About 25 wafers per hour per imprint cell, with four-cell clusters reaching approximately 100 wafers per hour.

A reported equipment-investment requirement of around 40% of an equivalent EUV setup. A claimed 14-nanometer line width, described in the source as roughly corresponding to the industry’s 5-nanometer node. The source also highlights DNP’s planned nano-imprint templates, Canon’s acquisition of Molecular Imprints in 2014, evaluation work by Kioxia and SK Hynix, and Canon’s first commercial shipment to the Texas Institute for Electronics in 2024.

These examples show that the technology has moved beyond laboratory research, but they do not yet demonstrate high-volume commercial success. Relevant source moment: [04:29–06:14] OIST physicist Tsumoru Shintake represents a second alternative. His proposed EUV architecture uses two mirrors instead of the much larger number used in conventional systems, potentially allowing more of the source light to reach the wafer.

The source says his designs could reduce power requirements to roughly 100 kilowatts and that his team has begun building hardware rather than stopping at theoretical proposals. Nikon’s effort is less radical but potentially more commercially immediate. It is targeting argon fluoride immersion lithography, a deep ultraviolet technology still used for many layers of advanced chips.

The source says Nikon plans a platform compatible with ASML-based manufacturing lines, which could reduce switching costs and give chipmakers leverage in price negotiations. Rapidus provides the manufacturing and national-industrial dimension. Backed by the Japanese government and major companies, it licensed two-nanometer gate-all-around technology from IBM, built a fab in Hokkaido, and reported working two-nanometer transistors in 2025.

Its stated production targets remain ambitious and uncertain, but the project could give Japan an advanced domestic customer for both existing and future lithography technologies. Relevant source moment: [22:44–25:58]

Distinctive insights

The most important insight is that a monopoly can be weakened without being defeated at its strongest point. Canon does not initially need to replace EUV in the highest-volume logic fabs. Nano-imprint could first serve 3D NAND, specialized logic, photonics, or advanced packaging—areas where lower throughput or more regular patterns may be acceptable.

A second insight is that ASML’s moat includes customer habits and workflow integration, not just technical performance. Nikon’s proposed compatibility with ASML-oriented fabs directly targets this switching-cost barrier. Even a credible alternative may matter before it wins large market share, because it changes negotiations and future investment decisions.

The source also emphasizes that Japan’s projects are complementary rather than identical. Rapidus still depends on ASML equipment today, while Canon, OIST, and Nikon create possible alternatives for tomorrow. Japan is portrayed as both an important ASML customer and a country seeking to prevent any foreign supplier from having an absolute veto over its technological capacity.

Predictions and conditions

The source’s near-term prediction is cautious: EUV will remain the leading-edge workhorse over at least the next several years. ASML’s backlog, established production ecosystem, throughput, and customer commitments all support that conclusion. Canon’s more limited forecast is to sell roughly 10–20 nano-imprint systems annually within five years.

Its success depends on solving three major problems: Higher throughput for large fabs. Sub-nanometer overlay accuracy across many chip layers. Defect control when a physical template contacts the wafer.

The forecast would weaken if major foundries continue evaluating nano-imprint without committing to high-volume production, if template lifetimes remain too short, or if yields fail to approach those of established methods. OIST’s proposal depends on translating optical simplification into a reliable production tool without unacceptable losses in resolution, field size, throughput, or alignment. Nikon’s challenge depends on securing orders and proving that its compatible DUV systems can compete on cost without disrupting fab operations.

Rapidus depends most heavily on yield, manufacturing scale, customer qualification, and whether it can meet its stated production timetable. Relevant source moment: [27:29–28:44]

Practical implications

For chipmakers, the immediate implication is not to abandon EUV but to evaluate patterning technology by application. Nano-imprint may be most useful where energy consumption and capital cost matter more than maximum throughput, while conventional EUV remains favored for the most demanding, high-volume logic production.

For ASML’s customers, credible alternatives could improve bargaining power even before they become full substitutes. Nikon’s proposed compatibility is especially significant because it addresses the cost of changing an installed production ecosystem rather than merely offering a different machine.

For governments and industrial planners, the source suggests that supply-chain resilience requires more than buying existing ASML tools. It also involves supporting domestic manufacturing, alternative lithography research, mask and template production, and international partnerships such as those linking Rapidus with IBM and Canon with U.S.

research institutions.